Method and apparatus for utilizing modulation codes that produce maximized sample timing information
US6882604B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2001 |
| Grant date | Apr 19, 2005 |
| Priority date | — |
| Expiry date | Oct 16, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/1833
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The invention is a modulation system that encodes symbols in accordance with a modulation code which, for a given communications channel, produces a signal that at the decoder includes maximized sample timing information in each encoded symbol. For systems that use PLLs to control a sample timing clock, the sample timing information is the average or squared slope. The modulation code used for a given system is selected based on the target response h(x) of the associated communications channel, such that h (x)*rk exceeds a predetermined threshold value, where “*” represents convolution and rk is a modulation code symbol. To reduce the bit overhead, or code rate, the inventive modulation system provides more modulation code symbols at the start of a data block, or sector, when system jitter is expected to be relatively high in response, for example, to the movement of a read head. The system then includes fewer modulation code symbols later in the block, when the system jitter associated with a read or receive operation is reduced. The system thus provides sufficient timing information to minimize PLL jitter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.