Digital signal receiver
US6882693B2 · kind B2 · utility
4Cited by
9References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 14, 2000 |
| Grant date | Apr 19, 2005 |
| Priority date | — |
| Expiry date | Sep 22, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/3809
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A digital signal receiver capable of obtaining a favorable receiving performance even if the input signal level changes rapidly is presented. A control voltage for controlling a variable gain amplifier is read by a microprocessor, and an operation-starting point of the variable gain amplifier is shifted by using this control voltage. As a result, a favorable level fluctuation response characteristic is obtained regardless of the input level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.