Method for preparing a device structure having a wafer structure deposited on a composite substrate having a matched coefficient of thermal expansion
US6884645B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 18, 2003 |
| Grant date | Apr 26, 2005 |
| Priority date | — |
| Expiry date | Apr 18, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76251
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer structure is deposited on a composite substrate structure having at least two substrate layers bonded together. A first substrate layer is made of a first substrate material having a first-substrate-layer material transverse coefficient of thermal expansion, greater than the wafer transverse coefficient of thermal expansion, and a second substrate layer is made of a second substrate material having a second-substrate-layer material transverse coefficient of thermal expansion, measured parallel to the transverse direction, less than the wafer transverse coefficient of thermal expansion. The substrate layers are present in relative proportions such that the substrate transverse coefficient of thermal expansion differs from the wafer transverse coefficient of thermal expansion by not more than about 2×10−6/° F.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.