Semiconductor device having at least three power terminals superposed on each other
US6885096B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2001 |
| Grant date | Apr 26, 2005 |
| Priority date | — |
| Expiry date | Jul 10, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present has an object of reducing a wiring resistance caused by the wiring metal such as bonding wire, and self-inductance, in a semiconductor device for large power, such as IGBT module. Therefore, the invention has at lest three or more power terminals superimposed on each other, wherein at least one semiconductor chip is connected electrically in a way to be sandwiched between predetermined two power terminals among the power terminals. A power terminal on one end among the aforementioned superposed power terminals and a power terminal on the other end among the superposed power terminals can be led out in the same direction, for example.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.