Simplified bottom electrode-barrier structure for making a ferroelectric capacitor stacked on a contact plug
US6885570B2 · kind B2 · utility
1Cited by
8References
22Claims
0Family size
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Key dates
| Filing date | Nov 8, 2002 |
| Grant date | Apr 26, 2005 |
| Priority date | — |
| Expiry date | Dec 6, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/682
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention is related to the realization of a simplified bottom electrode stack for ferroelectric memory cells. More particularly, the invention is related to ferroelectric memory cells wherein the ferroelectric capacitor is positioned directly on top of a contact plug. The bottom electrode stack is prepared by depositing a ferroelectric film atop an Ir or Ru metal electrode layer, then annealing the ferroelectric layer in an oxygen ambient wherein the partial pressure of oxygen is controlled at a level sufficient to oxidize the ferroelectric layer but not at a level sufficient to oxidize the metal electrode layer
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.