Apparatus for and method of processing low-speed circuit data and high-speed packet data
US6885668B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2000 |
| Grant date | Apr 26, 2005 |
| Priority date | — |
| Expiry date | Apr 5, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W36/18
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Disclosed is an apparatus and a method capable of processing low-speed circuit data lower than 64 kbps and high-speed packet data higher than 64 kbps in which a high-speed data network is constructed by converting an LCIN (local CDMA (code division multiple access) interconnection network) for supplying a communication path of packet data among sub-systems in a BSC (base station controller) of CDMA system to an ATM (asynchronous transfer mode) for processing high-speed data, installing a TSB (transcoder selector bank) or an SDU (selector distribution unit) for processing high-speed packet data higher than 64 kbps in the BSC, and linking an ATM switch to an MSC (mobile switching center) to provide a high-speed data service with respect to other network. The TSB for processing voice data and low-speed data lower than 64 kbps and high-speed data higher than 64 kbps, or the TSB for processing high-speed data higher than 64 kbps is provided to the BSC, thus allowing high-speed data processing up to 2 mbps, high-speed data service, multimedia service like a video service, and high-speed Internet service.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.