Patent · US Expired

Method, system, and product for achieving optimal timing in a data path that includes variable delay lines and coupled endpoints

US6886147B2 · kind B2 · utility

6Cited by
5References
39Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 31, 2002
Grant dateApr 26, 2005
Priority date
Expiry dateMay 14, 2023

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/327
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The present invention is a method, system, and product for optimizing timing in a circuit after layout of the circuit has been completed. The circuit includes at least one variable delay line and includes coupled endpoint devices. The variable delay line includes multiple, different selectable settings. A current setting of the variable delay line is varied from a maximum setting to a minimum setting. A timing accuracy indicator of a combination of the coupled endpoint devices is determined as the variable delay line is varied from its maximum setting to its minimum setting. Thus, multiple timing accuracy indicators are determined where an indicator is determined for and associated with each one of the settings from the maximum setting to the minimum setting. An optimum one of the selectable settings is determined utilizing the timing accuracy indicators, wherein the optimum one of the settings is associated with an optimum one of the multiple timing accuracy indicators.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.