Structure of TFT planar display panel
US6888161B2 · kind B2 · utility
18Cited by
6References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 17, 2002 |
| Grant date | May 3, 2005 |
| Priority date | — |
| Expiry date | Dec 17, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6723
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A structure of a thin film transistor (TFT) planar display panel is disclosed. The structure includes a light-transmissible substrate, a buffer layer formed on the light-transmissible substrate, a top-gate TFT structure formed on the buffer layer and including a channel region, and a light-shielding structure formed between a back light source and the top-gate TFT structure, and substantially aligned with the channel region for protecting the channel region from illumination of the back light source. The process for manufacturing a TFT planar display panel is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.