Nonvolatile semiconductor memory device, manufacturing method thereof, and operating method thereof
US6888194B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 26, 2003 |
| Grant date | May 3, 2005 |
| Priority date | — |
| Expiry date | Jun 26, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0475
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Nonvolatile memory elements are disclosed which can have increased capacity, reduced operating voltage and/or faster operating speeds. According to one embodiment, a nonvolatile memory element can include a first diffusion layer (2) and a second diffusion layer (3) formed in a main surface of a substrate (1). A laminate film can be formed near a first diffusion layer (2) and/or a second diffusion layers (3) that includes a first insulating film (4a or 4), a second insulating film (5a or 5), and a third insulating film (6a or 6). A gate insulating film (7) can be formed a channel region and gate electrode (8) can be formed to cover gate insulating film (7) and the laminate film(s) that has a T-shape. A gate electrode (8) can have end portions that sandwich a first insulating film (4a or 4), a second insulating film (5a or 5), and a third insulating film (6a or 6) with a first diffusion layer (2) and/or second diffusion layer (3).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.