Fracturable incomplete look up table for area efficient logic elements
US6888373B2 · kind B2 · utility
17Cited by
47References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2003 |
| Grant date | May 3, 2005 |
| Priority date | — |
| Expiry date | Feb 11, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17728
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed is a configurable logic circuit that includes at least 6 inputs and at least two outputs. The configurable logic element can carry out only a subset of all 6-input logic functions and, thus, requires a substantially smaller silicon area than a 6-LUT that can perform all 6-input logic functions. Also, the configurable logic circuit can be configured such that a first subset of the inputs drive one of the outputs and a second subset of the inputs drive another output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.