Method and apparatus for replacing defective rows in a semiconductor memory array
US6888731B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2002 |
| Grant date | May 3, 2005 |
| Priority date | — |
| Expiry date | Nov 29, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for replacing a defective row in a CAM array, the array having a plurality of normal rows of cells and at least one spare row of cells, each the row being enabled by a corresponding word line signal, and having corresponding match line outputs switched to corresponding ones of a plurality of match line inputs in a match line decoder, the method comprising the steps of: (a) generating a signal indicative of the location of a defective row in the array; (b) generating a set of word line select signals for selecting ones of the plurality of normal rows; (d) using the defective row signal to switch a word line select signal of the defective row to a row adjacent the defective row and switching the adjacent row word line select signals to subsequent rows upto the at least one spare row, and (e) using the defective row signal to switch the match line input of the row adjacent the defective row to the matchline input of the defective row and switching the subsequent row match line input to the adjacent row match line input, repeating the switching for subsequent matchlines upto the matchline of the at least one spare row.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.