Nonvolatile memory device
US6888745B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2003 |
| Grant date | May 3, 2005 |
| Priority date | — |
| Expiry date | Dec 4, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An object of the present invention is to provide a mass-storage nonvolatile memory device capable of performing high speed operation. The nonvolatile memory device comprises a memory array comprising a plurality of memory cells arranged in a matrix, each of the memory cells comprising a variable resistor element formed of a manganese-containing oxide having a perovskite structure in which an electric resistance is varied by application of a voltage pulse and a variation amount of the electric resistance is variable depending on the magnitude of the voltage amplitude; and a program pulse generation circuit that, in order to program 3-level or larger multi-level data corresponding to one erase state and two or more program states into the variable resistor element, is capable of performing generation of program pulses having two or more different voltage amplitudes corresponding to the program states, the generation being separately performed corresponding to program data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.