Clock and data regenerator with demultiplexer function
US6888906B2 · kind B2 · utility
3Cited by
8References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2001 |
| Grant date | May 3, 2005 |
| Priority date | — |
| Expiry date | Oct 18, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/047
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Clock and data regenerator with demultiplexer function wherein the clock and phase generator operates with four sampling flip-flops whose output signals are compared with one another with the aid of two pairs of EXOR elements. The associated phase signals generated by the EXOR elements are added and compared with one another. The phase regulating voltage thus obtained controls an oscillator which generates the sampling clock signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.