Efficient reading of a remote first-in first-out buffer
US6889270B2 · kind B2 · utility
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4References
5Claims
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Key dates
| Filing date | Mar 15, 2004 |
| Grant date | May 3, 2005 |
| Priority date | — |
| Expiry date | Mar 15, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F5/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for a processor to efficiently accesses a remote First-in First-out (FIFO) buffer that is used to record event information. The access involves an interrupt mechanism when the FIFO transitions from the empty state, a mechanism for reading a FIFO entry including FIFO state information, and a mechanism for reading large areas of the FIFO while maintaining the pointers and interrupt protocols.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.