Systems and methods for generating an artwork representation according to a circuit fabrication process
US6892374B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Jun 19, 2002 |
| Grant date | May 10, 2005 |
| Priority date | — |
| Expiry date | Jun 19, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, the present invention relates to a system for generating an artwork representation according to a circuit fabrication process. The system comprises a cell library that stores at least dimensional information associated with a plurality of circuit cells, wherein each of the plurality of circuit cells is defined by a sub-mask for a respective logical device according to the circuit fabrication process; an instance placement engine that generates a circuit layout that is defined by at least a specification file specifying an arrangement of logical devices and the cell library; and an artwork generator that generates an artwork representation that defines a mask for etching of the generated circuit layout according to the circuit fabrication process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.