Data writing and reading methods for flash memories and circuitry thereof
US6894927B2 · kind B2 · utility
0Cited by
3References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 2, 2003 |
| Grant date | May 17, 2005 |
| Priority date | — |
| Expiry date | Sep 2, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data writing and reading methods and the implementation circuitry is revealed, in which two flash memories are connected to a data bus in parallel, and two data writing or reading signal lines are respectively electrically connected to each flash memory. The data writing or reading timings of flash memories are controlled by two non-overlapping data writing or reading signals, which may differ from each other by 180°, thereby data can be written into or read from the flash memory so as to increase the data writing and reading efficiencies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.