Synchronization of asynchronous emulated interrupts
US6895460B2 · kind B2 · utility
39Cited by
7References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2002 |
| Grant date | May 17, 2005 |
| Priority date | — |
| Expiry date | Aug 4, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed herein is a method and apparatus for handling an asynchronous interrupt while emulating software so that the system is in a known state when the interrupt is handled. The method includes suspending the asynchronous interrupt so that it remains pending without interrupting software execution when it arrives, then synchronizing delivery of the interrupt to an instruction by issuing an exception. The instructions which trigger exceptions are inserted in the native code at locations corresponding to original instruction boundaries.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.