Prefetch buffer method and apparatus
US6895475B2 · kind B2 · utility
11Cited by
11References
36Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2002 |
| Grant date | May 17, 2005 |
| Priority date | — |
| Expiry date | Mar 14, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6022
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus are provided for supplying data to a processor in a digital processing system. The method includes holding data required by the processor in a cache memory, supplying data from the cache memory to the processor in response to processor requests, performing a cache line fill operation in response to a chache miss, supplying data from a prefetch buffer to the cache memory in response to the cache line fill operation, and speculatively loading data from a lower level memory to the prefetch buffer in response to the cache line fill operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.