Semiconductor device wherein chips are stacked to have a fine pitch structure
US6897552B2 · kind B2 · utility
66Cited by
13References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 10, 2002 |
| Grant date | May 24, 2005 |
| Priority date | — |
| Expiry date | Dec 10, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
There is here disclosed a semiconductor device comprising a chip-mounting-member having a lead formed on its major surface, the lead having a thin film plated portion which covers a surface of a predetermined portion of the lead, a semiconductor chip having a bump formed on its major surface, and mounted on the chip-mounting-member by electrically connecting the bump to the lead via the plated portion, and an encapsulating-member formed between the semiconductor chip and the chip-mounting-member.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.