Input buffer circuit and semiconductor memory device
US6897684B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2003 |
| Grant date | May 24, 2005 |
| Priority date | — |
| Expiry date | Mar 8, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/01855
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An input buffer circuit is made up from: a differential amplifier that receives an input signal from the outside and a reference voltage for determining the level of the input signal; a transistor for a first operating current path for supplying a prescribed first operating current to the differential amplifier and that, by having a prescribed fixed voltage supplied to its gate, is always ON; and at least one transistor for a second operating current path for supplying a second operating current that is greater than the first operating current to the differential amplifier when ON, the transistor for the second operating current path being ON/OFF controlled in accordance with a control signal from the outside.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.