High-speed, high-resolution and low-consumption analog/digital converter with single-ended input
US6897801B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2002 |
| Grant date | May 24, 2005 |
| Priority date | — |
| Expiry date | Jun 13, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/804
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An A/D converter having capacitors of a first array of sampling capacitors weighted in binary code connected between a first common circuit node and an input terminal to be charged to an input voltage with respect to a ground of a signal to be converted, and in accordance with SAR technique are then selectively connected with two differential reference terminals, and at the same time capacitors of a second array equal to the first and all connected to a second node are selectively connected to ground and the lower differential voltage terminal. The two nodes are connected to the respective inputs of a comparator. A logic unit controls the connections of the capacitors of the two arrays in accordance with a predetermined timing program and as a function of the output of the comparator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.