Matrix display and its drive method
US6897884B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2001 |
| Grant date | May 24, 2005 |
| Priority date | — |
| Expiry date | Oct 15, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0247
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a display device capable of low power and multi-color displaying without raising a frame rate due to increase of display gradations in number by combining a gradation representation through a FRC and a gradation representation system using a pulse width modulation or pulse height modulation method, the gradation representation is executed by a method of pulse width or pulse height modulation in one frame using lower significant N bits to a video signal of M bits, and the display of the gradations is performed by the FRC of the present invention using more significant M−N bits and further using 2M−N−1 frames, and thus the number of the frames required for FRC is reduced to decrease a frame frequency to thereby realize a gradation display with reduction of electric power and suppression of flickers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.