Private arbitrated loop self-test management for a fibre channel storage enclosure
US6898184B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 1998 |
| Grant date | May 24, 2005 |
| Priority date | — |
| Expiry date | Nov 15, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2221
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A self-test method and system for facilitating reliable and fault-tolerant operation of a multi-peripheral-device enclosure for use in high-availability computer systems. The reliable and fault-tolerant multi-peripheral-device enclosure uses a three-tiered port bypass control strategy for diagnosing and isolating malfunctioning peripheral devices within the multi-peripheral-device enclosure, and uses a similar a three-tiered port bypass control strategy for isolation of the entire multi-peripheral-device enclosure from a communications medium that interconnects the multi-peripheral-device enclosure with one or more host computers. This three-tiered port bypass control strategy is employed by a self-test routine to isolate the multi-peripheral-device enclosure from external processing elements in order to test peripheral devices and other components within the multi-peripheral-device enclosure, and to isolate any detected defective or malfunctioning components.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.