Method and system for efficiently overriding net values in a logic simulator machine
US6898562B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 7, 2000 |
| Grant date | May 24, 2005 |
| Priority date | — |
| Expiry date | May 16, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system are described in a logic simulator machine for overriding a value of a net during execution of a test routine. A model of a logic design to be simulated is built utilizing the logic simulator machine. The logic design includes multiple nets. One of the nets whose actual value may be overridden is selected. A multiplexer is inserted into the model. The multiplexer receives as its inputs the actual value of the selected net, a control bit, and an override value bit. An override value is input into the multiplexer using the override value bit. The multiplexer outputs a current value of the selected net. The current value is thus propagated to other nets. The override value is propagated as the current value of the net instead of the net's actual value throughout execution of the test routine when the multiplexer control bit is set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.