Round-off algorithm without bias for 2's complement data
US6898614B2 · kind B2 · utility
3Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2001 |
| Grant date | May 24, 2005 |
| Priority date | — |
| Expiry date | Mar 18, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/49947
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A round off mechanism maintains a mean value of the operand while rounding twos complement binary data. Positive data values are incremented at the first discard bit prior to truncation of the discard bits, as are negative data values having a one within the most significant discard bit and at least one other discard bit. The discard bits are simply truncated for all other negative data values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.