Autonomous signal processing resource for selective series processing of data in transit on communications paths in multi-processor arrangements
US6898657B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 16, 2002 |
| Grant date | May 24, 2005 |
| Priority date | — |
| Expiry date | Jun 6, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17337
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-processor arrangement having an interprocessor communication path between each of every possible pair of processors, in addition to I/O paths to and from the arrangement, having signal processing functions configurably embedded in series with the communication paths and/or the I/O paths. Each processor is provided with a local memory which can be accessed by the local processor as well as by the other processors via the communications paths. This allows for efficient data movement from one processor's local memory to another processor's local memory, such as commonly done during signal processing corner turning operations. Configurable signal processing logic may be configured to host one or more signal processing functions which allow data to be autonomously accessed from the processor local memories, processed, and re-deposited in a local memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.