Co-processor including a media access controller
US6898673B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2002 |
| Grant date | May 24, 2005 |
| Priority date | — |
| Expiry date | Oct 27, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/822
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A compute engine includes a central processing unit coupled to a coprocessor. The coprocessor includes a media access controller engine and a data transfer engine. The media access controller engine couples the compute engine to a communications network. The data transfer engine couples the media access controller engine to a set of cache memory. In further embodiments, a compute engine includes two media access controller engines. A reception media access controller engine receives data from the communications network. A transmission media access controller engine transmits data to the communications network. The compute engine also includes two data transfer engines. A streaming output engine stores network data from the reception media access controller engine in cache memory. A streaming input engine transfers data from cache memory to the transmission media access controller engine. In one implementation, the compute engine performs different network services, including but not limited to: 1) virtual private networking; 2) secure sockets layer processing; 3) web caching; 4) hypertext mark-up language compression; 5) virus checking; 6) firewall support; and 7) web switching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.