System and method for automatic deskew across a high speed, parallel interconnection
US6898742B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2002 |
| Grant date | May 24, 2005 |
| Priority date | — |
| Expiry date | Nov 19, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/14
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method and system performs automatic deskew tuning and alignment across high-speed, parallel interconnections in a high performance digital system to compensate for inter-bit skew. Rather than using a VDL, digital elements such as registers and multiplexers are used for performing the automatic deskew tuning and alignment procedure. The result is a simpler, more robust deskew system capable of operating over a wider range of input values with greater accuracy and over a broader range of temperatures. In addition, the method and apparatus performs a one to four unfolding of the signal on each interconnection. The system includes a deskew controller and a plurality of deskew subsystems. The deskew controller automatically computes the amount of delay needed to correct the skew on each interconnection and feeds a different (or appropriate) delay value to each deskew subsystem located at the receiving end of each interconnection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.