Semiconductor integrated circuit device including first, second and third gates
US6901006B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 30, 2003 |
| Grant date | May 31, 2005 |
| Priority date | — |
| Expiry date | Sep 30, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6892
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a semiconductor integrated circuit device including a third gate, the present invention improves miniaturization and operation speed and reduces a defect density of an insulator film. In a semiconductor integrated circuit device including a well of a first conductivity type formed in a semiconductor substrate, a source/drain diffusion layer of a second conductivity type inside the well, a floating gate formed over the semiconductor substrate through an insulator film, a control gate formed and isolated from the floating gate through an insulator film, word lines formed by connecting the control gates and a third gate formed and isolated from the semiconductor substrate, the floating gate and the control gate through an insulator film and different from the floating gate and the control gate, the third gate is buried into a space of the floating gates existing in a direction vertical to the word line and a channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.