Semiconductor equipment
US6903460B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 21, 2003 |
| Grant date | Jun 7, 2005 |
| Priority date | — |
| Expiry date | Dec 10, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/127
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor equipment includes a semiconductor substrate, a plurality of transistors having a source cell and a drain cell disposed alternately on the substrate, and upper and lower layer wirings for electrically connecting the source cells and the drain cells. The lower layer wiring includes a first source wiring for connecting the neighboring source cells and a first drain wiring for connecting the neighboring drain cells. The upper layer wiring includes a second source wiring for connecting to the first source wiring and a second drain wiring for connecting to the first drain wiring. A width of the second source wiring is wider than that of the first source wiring, and a width of the second drain wiring is wider than that of the first drain wiring. The second source wiring and the second drain wiring are disposed alternately.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.