Raid controller disk write mask
US6904498B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 8, 2002 |
| Grant date | Jun 7, 2005 |
| Priority date | — |
| Expiry date | Feb 18, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2211/1066
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A RAID disk array controller [(FIG. 7)] implements a write mask 16 to support partial-stripe updates [(FIG. 4)] from a host system [60] without expensive RAM to RAM copying and repeated disk accesses to assemble the updated stripe. New data from the host [20,22] is transferred into a single buffer [14,40] and a local processor [80] tracks—by setting bits [30,32] in the write mask—which segments of the target stripe are updated. The disk array is accessed to transfer the target stripe into the same buffer [40], but the buffer memory write enable [58] is inhibited—responsive to the write mask [52]—during transfer of the segments that were updated by the host. The complete, updated stripe is thus formed in a single buffer for parity calculations and write to the disk array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.