Asynchronous coupling and decoupling of chips
US6906549B2 · kind B2 · utility
12Cited by
6References
41Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2002 |
| Grant date | Jun 14, 2005 |
| Priority date | — |
| Expiry date | Apr 22, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/45
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In some embodiments, a chip includes first and second nodes, a variable voltage source, and transmitter and control circuitry. The transmitter includes a driver coupled to the first and second nodes, and first and second resistive structures coupled between the first and second nodes, respectively, and the variable voltage source. The control circuitry selects an impedance level for the first and second resistive structures, and detect coupling of a remote receiver to the transmitter through interconnects and detect decoupling of the remote receiver from the transmitter. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.