Prevention of metastability in bistable circuits
US6906555B2 · kind B2 · utility
25Cited by
17References
24Claims
0Family size
Inventor
Key dates
| Filing date | Jun 10, 2003 |
| Grant date | Jun 14, 2005 |
| Priority date | — |
| Expiry date | Jul 16, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0338
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus implementing techniques for prevention of metastability in a bistable circuit. The techniques include detecting a change in a data signal, sampling the detected change in reference to a sampling window of a clock signal input of a bistable circuit to determine if the detected change occurs within the sampling window, and selecting a stable data input to present to an input of the bistable circuit based on whether the detected change occurs within the sampling window. The sampling window represents a time period during which a change in the data signal can cause metastability in a bistable circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.