Control loop compensation circuit and method
US6906578B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 30, 2001 |
| Grant date | Jun 14, 2005 |
| Priority date | — |
| Expiry date | Apr 14, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/45475
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A control loop circuit is disclosed for optimizing a power supply output under varying load conditions. The power supplye has a main loop amplifier and an output stage to generate the output. The control loop circuit includes a static control path coupled to the output and having an error amplifier. The error amplifier is operative to generate an error signal for presentation to the main loop amplifier where the error signal represents the difference between a desired output and a sensed output. A dynamic control path is coupled to the error amplifier output and is responsive to the error signal to generate a dynamic compensation signal. The dynamic control path has an output coupled to the main loop amplifier output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.