Structures for implementing integrated conductor and capacitor in SMD packaging
US6906910B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 20, 2004 |
| Grant date | Jun 14, 2005 |
| Priority date | — |
| Expiry date | Feb 9, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Structures are provided for implementing an integrated conductor and capacitor in a surface mounted device (SMD) package. A first pair and a second pair of contacts contained within the SMD package respectively are provided in mating engagement with a first pair and a second pair of corresponding SMD package contacts. A conductor extends between the first pair of contacts, contained within the SMD package. A capacitor is defined between the second pair of contacts, contained within the SMD package. An additional one or pair of integral capacitors optionally is provided for providing additional capacitance to ground to decouple common mode noise from the power planes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.