Systems and methods for facilitating testing of pad receivers of integrated circuits
US6907376B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2003 |
| Grant date | Jun 14, 2005 |
| Priority date | — |
| Expiry date | Jul 11, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3183
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A preferred integrated circuit for facilitating receiver trip level testing functionality includes a first pad which incorporates a first driver and a first receiver. The first driver is configured to provide a first pad output signal to a component external to the IC. The first receiver is configured to receive a first pad input signal from a component external to the IC, and to provide a first receiver digital output signal to a component internal to the IC in response to the first pad input signal. Additionally, a first test circuit is provided that is arranged internal to the IC, with the first test circuit being adapted to provide information corresponding to at least one receiver trip-level characteristic of the first receiver of the first pad. Systems, methods and computer readable media also are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.