Method for manufacturing and packaging integrated circuit
US6907659B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 5, 2003 |
| Grant date | Jun 21, 2005 |
| Priority date | — |
| Expiry date | Aug 16, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49222
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing and packaging an integrated circuit includes following steps: pressure a continuous pin material and a base board area at first; then cut off pin material into several pin units, accommodate each pin units into respective position in a mould, and ejecting plastic into the mould gap to shape a pin unit, then remove waste part of the pin material after removing down the mould parts; put four pin units and a base board into a rectangle mould, then eject plastic again into mould gap, after that cut off waste part of the base board to attain an IC socket; stick an IC chip on top of the base board of the IC socket and wire it. Finally, cover and stick a panel on the IC socket to finish the whole IC packaging procedures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.