Semiconductor device with conduction test terminals
US6909172B2 · kind B2 · utility
0Cited by
3References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 22, 2003 |
| Grant date | Jun 21, 2005 |
| Priority date | — |
| Expiry date | Jan 22, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A semiconductor device designed to facilitate testing. Superimposed first and second semiconductor chips each include a plurality of internal terminals, an external terminal, and a plurality of transistors. A plurality of wires connect the internal terminals, the transistors, and the external terminals of the first and second semiconductor chips in series.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.