Fault tolerant bus for highly available storage enclosure
US6910089B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2001 |
| Grant date | Jun 21, 2005 |
| Priority date | — |
| Expiry date | Jul 19, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A backplane apparatus for an electronic device enclosure includes a common bus comprising a plurality of signal lines, each signal line having a current limiting element, RA. Isolation circuitry is provided for electrically coupling each of the plurality of signal lines of the common bus to a corresponding plurality of signal lines of the electronic device to enable signal communication between the common bus and the electronic device through the isolation circuitry. In one embodiment, the backplane apparatus further comprises connectors to enable removably attaching the electronic devices such as disk drives. In one embodiment, the isolation circuitry coupling each signal line of the common bus to the connector comprises an inline resistor, RD. The isolation circuitry associated with some of the signal lines may include pull up resistors. The values of RA and RD are selected to ensure that the common bus meets pre-determined current and voltage requirements so that the common bus can change states even if one or more of the devices fail by shorting to ground.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.