Secure memory management unit which uses multiple cryptographic algorithms
US6910094B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 1998 |
| Grant date | Jun 21, 2005 |
| Priority date | — |
| Expiry date | May 23, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1441
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit accesses first encrypted data stored in an external random access memory and accesses second encrypted data stored in an external read-only memory. The external random access memory and the external read-only memory are external to the integrated circuit. When accessing a first portion of the first encrypted data stored in the external random access memory, a first algorithm is used to decrypt the first portion of the first encrypted data. When accessing a first portion of the second encrypted data stored in the external read-only memory, a second algorithm is used to decrypt the first portion of the second encrypted data. The second algorithm is different than the first algorithm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.