Math coprocessor
US6912557B1 · kind B1 · utility
33Cited by
4References
8Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 9, 2000 |
| Grant date | Jun 28, 2005 |
| Priority date | — |
| Expiry date | Jul 23, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/3884
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A math coprocessor 1300 includes a multiply-accumulate unit 1600. Multiplier-accumulate unit 1600 includes a multiplier array 1603 for selectively multiplying first and second operands, the first and second operands having a data type selected from the group including floating point and integer data types. An adder 1604 selectively performs addition and subtraction operations on third and fourth operands, the third and fourth operands selected by multiplexer circuitry from the contents of a set of associated source registers, data output from multiplier array 1603 and data output from adder 1604.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.