Multi-chip module, semiconductor chip, and interchip connection test method for multi-chip module
US6914259B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2002 |
| Grant date | Jul 5, 2005 |
| Priority date | — |
| Expiry date | Nov 20, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A multi-chip module is implemented by connecting a plurality of connection pads provided on, for example, two semiconductor chips via a plurality of conductive connecting members. To carry out a test for determining the quality of the connection between the two semiconductor chips, the multi-chip module is further provided with a plurality of switch elements so that the plurality of connecting members can be electrically conducted in a serial manner via the connection pads of the semiconductor chips. During the connection test, all the switch elements are turned on, and the impedance between both ends of the line including the plurality of connecting members conducted in a serial manner is measured using two probing pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.