Graphic processor and graphic processing system
US6914605B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2001 |
| Grant date | Jul 5, 2005 |
| Priority date | — |
| Expiry date | Mar 3, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T17/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The rendering performance of a graphic processor is improved by effectively using a data bus. An externally-input graphics command is stored in a work memory via the data bus. A display data generation section receives a graphics command stored in the work memory via the data bus, decodes the received graphics command, and outputs the display data to the data bus. An image display section receives display data stored in the work memory via the data bus, and displays an image on a display device. A bus control section monitors the status of use of the data bus, and controls the right to use the data bus according to the priority of each data transfer operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.