Method and apparatus for digital column fixed pattern noise canceling for a CMOS image sensor
US6914627B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | May 27, 1998 |
| Grant date | Jul 5, 2005 |
| Priority date | — |
| Expiry date | Apr 23, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/677
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention is directed to a method and apparatus for reading out signals from a MOS image sensor. The invention allows for a relatively high fixed pattern noise canceling rate, even in low light environments. The invention includes a digital processing structure for processing the signals from a pixel array. The pixel array includes a reference row that is formed by being covered by a light shield or black layer to cover the pixels of the reference row from light. The signals from the reference row are converted to digital values and stored in fixed pattern noise storage circuitry. Then, as each of the remaining rows of the pixel array are read out, they are converted to digital values and the digital reference row signals are subtracted therefrom to produce data image signals that are relatively free of fixed pattern noise. Thus, the fixed pattern noise canceling rate is made to depend on the precision of an analog-to-digital converter, rather than the process variations of an analog subtraction circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.