Multiplier-free methods and apparatus for signal processing in a digital communication system
US6914934B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 3, 1999 |
| Grant date | Jul 5, 2005 |
| Priority date | — |
| Expiry date | Sep 3, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/38
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Signal processing operations are performed in a digital communication system receiver on a sequence of received symbols, each representing a number of information bits. The symbols correspond to points in a given modulation constellation generated by applying a predetermined rotation, e.g., a 45° rotation, to an otherwise conventional modulation constellation, e.g., a QPSK constellation, a 16-QAM constellation, etc. The use of the rotated constellation allows certain signal processing operations, such as filtering, Least-Mean-Squares (LMS) estimation, and Maximum-Likelihood (ML) sequence detection via the Viterbi algorithm, to be performed without the need for multipliers. By eliminating or substantially reducing the number of required multiplication operations, the invention significantly reduces the complexity and delay associated with the corresponding signal processing circuitry. Advantageously, this reduction in complexity and delay is accomplished without the use of any approximation or other reduction in precision.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.