Noise checking method and apparatus
US6915249B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 9, 2000 |
| Grant date | Jul 5, 2005 |
| Priority date | — |
| Expiry date | Feb 8, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In order to achieve augmentation of the accuracy in calculation of noise and augmentation of the accuracy in a noise check which is performed, for example, when an electronic circuit is designed and further realize significant reduction of the time required for a noise check and augmentation of the operation efficiency by reduction of the man-hours of a designer in a noise analysis, a noise checking apparatus includes a model production section (3) for producing a simulation model of a circuit portion relating to a noticed wiring line, a simulation section (4) for performing a simulation using the simulation model to calculate a signal waveform which propagates in the noticed wiring line and calculate a noise waveform superposed on the signal waveform for each kind of noise, a noise waveform synthesis section (5) for synthesizing the signal waveform and the noise waveforms with generation timings of the noise waveforms taken into consideration to obtain a noise composite waveform, and a noise checking section (6) for performing noise checking based on the noise composite waveform.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.