Method and system for creating secure address space using hardware memory router
US6915402B2 · kind B2 · utility
32Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 23, 2001 |
| Grant date | Jul 5, 2005 |
| Priority date | — |
| Expiry date | Jan 28, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1657
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system providing dynamic allocation of memory through hardware is disclosed. An embodiment provides for a multi-processor system providing for a secure partitioned memory. The system comprises a processor(s), a hardware implemented memory router coupled to the processor(s), and memory coupled to the memory router. The memory router stores memory partition information, which describes the memory allocated to the processor(s). Furthermore, the memory router maps a memory access request from a processor to an address in the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.