SIMD processor with concurrent operation of vector pointer datapath and vector computation datapath
US6915411B2 · kind B2 · utility
6Cited by
3References
35Claims
0Family size
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Key dates
| Filing date | Jul 18, 2002 |
| Grant date | Jul 5, 2005 |
| Priority date | — |
| Expiry date | Jun 21, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8092
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital signal processor (DSP) includes a SIMD-based organization wherein operations are executed on a plurality of single-instruction multiple data (SIMD) datapaths or stages connected in cascade. The functionality and data values at each stage may be different, including a different width (e.g., a different number of bits per value) in each stage. The operands and destination for data in a computational datapath are selected indirectly through vector pointer registers in a vector pointers datapath. Each vector pointer register contains a plurality of pointers into a register file of a computational datapath.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.