Active failsafe detection for differential receiver circuits
US6915459B2 · kind B2 · utility
2Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2001 |
| Grant date | Jul 5, 2005 |
| Priority date | — |
| Expiry date | May 6, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/08
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method, system and apparatus for providing failsafe detection for a differential receiver. A bus activity signal (11) is activated when receiving a differential data signal of sufficient amplitude to transition through a predetermined threshold. A failsafe signal (620) indicates a low differential voltage condition. A countdown time period commences (85) upon activation of either signal, and a failsafe condition is determined (89) to exist if the failsafe signal is active (87) when the countdown time period expires (86).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.