Signal processing integrated circuit
US6920470B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2001 |
| Grant date | Jul 19, 2005 |
| Priority date | — |
| Expiry date | May 8, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A low power programmable digital filter integrated circuit architecture has a programmable front end servicing up to 4 digital sources. Changing the programming of the front end permits digital outputs from different sensor types to be accommodated. Digital filtering is accomplished using a digital signal processor that is programmable to accommodate different decimation ratios. A serial data output register receives the filtered digital signals and provides them to an output port. The digital filter integrated circuit may be connected in a token passing configuration with other digital filter integrated circuits to increase the number of sources accommodated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.